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(R)
ISD1000A Series
Single-Chip Voice Record/Playback Devices 16- and 20-Second Durations
FEATURES
* * * Easy-to-use single-chip voice Record/Playback solution High-quality, natural voice/audio reproduction Manual switch or microcontroller compatible - Playback can be edge- or levelactivated Single-chip durations of 16 and 20 seconds Directly cascadable for longer durations Power-down mode - 1 A standby current (typical) Zero-power message storage - Eliminates battery backup circuits * * * * * * * * Fully addressable to handle multiple messages 100-year message retention (typical) 100,000 record cycles (typical) On-chip clock source No algorithm development required Single +5 volt supply Available in die form, DIP, and SOIC packaging Industrial temperature (-40C to +85C) version available
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* * * *
ISD1000A SERIES SUMMARY
Part Number ISD1016A ISD1020A Duration (Seconds) 16 20 Input Sample Rate (KHz) 8 6.4 Typical Filter Pass Band (KHz) 3.4 2.7
Information Storage Devices, Inc.
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ISD1000A Series
Product Data Sheets
GENERAL DESCRIPTION
Information Storage Devices' ISD1000A ChipCorder(R) Series provides high-quality, single-chip record/playback solutions for 16- and 20-second messaging applications. The CMOS devices include an on-chip oscillator, microphone preamplifier, automatic gain control, antialiasing filter, smoothing filter, and speaker amplifier. In addition, the ISD1000A Series is fully microprocessorcompatible, allowing complex messaging and addressing to be achieved. Recordings are stored in on-chip nonvolatile memory cells, providing zero-power message storage. This unique, single-chip solution is made possible through ISD's patented multilevel storage technology. Voice and audio signals are stored directly into memory in their natural form, providing high-quality, solid-state voice reproduction.
DETAILED DESCRIPTION
The ISD1000A ChipCorder Series devices are designed to Record and Play back audio and voice information in a single chip with a minimum of circuit complexity. This compact, easy-to-use, nonvolatile, low-power solution has been made possible by ISD's multilevel storage technology -- a breakthrough in storage technology in EEPROM. ISD's multilevel storage technology results in storage density that is eight times greater than digital memory. The ISD1000A nonvolatile analog array consists of 128K cells -- the equivalent of 1 Mbits of digital storage. The ISD1000A Series eliminates the need for digital conversion, digital compression, and voice synthesis techniques which often compromise voice quality and are more complicated to use. The ISD1000A Series includes signal conditioning circuits and control functions which enable a complete, high-quality Recording and Playback system in a single device. The ISD1000A is available in two versions, which store voice in 16- or 20-second arrays. Additional devices may be cascaded
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ISD1000A SERIES BLOCK DIAGRAM
Internal Clock XCLK 5-Pole Active Antialiasing Filter
Timing Sampling Clock
R
ANA IN ANA OUT MIC MIC REF AGC PreAmp
Amp
Analog Transceivers Decoders 128 K Cell Nonvolatile Multilevel Storage Array 5-Pole Active Smoothing Filter SP+ Mux Amp SP-
Automatic Gain Control (AGC) Power Conditioning Address Buffers Device Control
VCCA VSSA VSSD VCCD
A0 A1 A2 A3 A4 A5 A6 A7
PD
P/R
CE
EOM AUX IN
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Product Data Sheets
ISD1000A Series
ISD1000A SERIES PINOUTS
M0/A0 M1/A1 M2/A2 M3/A3 M4/A4 M5/A5 NC NC A6 A7 AUX IN VSSD VSSA SP+
1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15
assures the lowest possible overall power consumption.
VCCD P/R XCLK EOM PD CE NC ANA OUT ANA IN AGC MIC REF MIC VCCA SP-
DIP/SOIC
On-chip control functions make the ISD1000A Series very easy to use in a wide array of applications. Each device offers a variety of operating modes and interface options. The devices may be used in applications that require little more than a few switches and a battery. The devices may also be integrated into electronic systems where digital addresses can be provided for more sophisticated message addressing and control. The ISD1000A array is organized into 160 segments. Addresses A0 through A7 provide access to each segment in the array for message addressing. Addressing provides the capability of constructing messages by combining stored phrases and sounds.
to achieve longer recording durations. The nonvolatile storage array is based on productionproven, low-power CMOS EEPROM technology. The highly integrated ISD1000A Series contains all the basic functions required for high-quality voice Recording and Playback. The noise-cancelling Microphone Preamplifier and Automatic Gain Control (AGC) record both low-volume and highvolume sounds. The AGC attack and release times are adjusted by an external resistor and capacitor. Antialiasing is performed by a continuous fifth-order Chebyshev filter, requiring no external components or clocks to give toll-quality reproduction. The low corner of the passband is user-settable by two external capacitors. The devices contain their own temperature-stabilized timebase oscillator. The ISD1000A devices drive a speaker directly through differential outputs. This boosts power by four times and eliminates the need for a series capacitor or an output amplifier. The device will operate from a single power supply or from batteries. The device also includes a power down function for applications where minimum power consumption is critical. The CMOS-based design, combined with the nonvolatile storage array,
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PIN DESCRIPTIONS
Voltage Inputs (VCCA, VCCD)
To minimize noise, the analog and digital circuits in the ISD1000A Series devices use separate power busses. These voltage busses are brought out to separate pins and should be tied together as close to the supply as possible. In addition, these supplies should be decoupled as close to the package as possible.
Ground Inputs (VSSA, VSSD)
The ISD1000A Series of devices utilizes separate analog and digital ground busses. These pins should be tied together as close to the package as possible and connected through a low-impedance path to power supply ground.
Power Down Input (PD)
When not recording or playing back, the PD pin should be pulled HIGH to place the part in a very low power mode (see ISB specification). When EOM pulses LOW for an overflow condition, PD should be brought HIGH to reset the address pointer back to the beginning of the Record/Playback space.
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ISD1000A Series
Product Data Sheets
Chip Enable Input (CE)
The CE pin is taken LOW to enable all Playback and Record operations. The address inputs and Playback/Record input (P/R) are latched by the falling edge of CE. When CE is taken HIGH, the ISD1000A is unselected, the P/R is HIGH, and the auxiliary input is directed into the speaker amplifier.
Microphone Input (MIC)
The microphone input transfers its signal to the on-chip preamplifier. An on-chip Automatic Gain Control (AGC) circuit controls the gain of this preamplifier from -15 to 24 dB. An external microphone should be AC coupled to this pin via a series capacitor. The capacitor value, together with the internal 10 Kohm resistance on this pin, determines the low-frequency cutoff for the ISD1000A Series passband. See ISD's Application Notes and Design Manual in this book for additional information on low-frequency cutoff calculation.
Playback/Record Input (P/R)
The P/R input is latched by the falling edge of the CE pin. A HIGH level selects a Playback cycle while a LOW level selects a Record cycle. For a Record cycle, the address inputs provide the starting address and recording continues until PD or CE is pulled HIGH or an overflow is detected (i.e. the chip is full). When a Record cycle is terminated by pulling PD or CE HIGH, an End-Of-Message (EOM) marker is stored at the current address in memory. For a Playback cycle, the address inputs provide the starting address and the device will play until an EOM marker is encountered. The device can continue past an EOM marker in an operational mode, or if CE is held LOW in address mode. (See page 1-6 for more Operational Modes).
Microphone Reference Input (MIC REF)
The MIC REF input is the inverting input to the microphone preamplifier. This provides a noisecanceling or common-mode rejection input to the device when connected to a differential microphone. IF THIS INPUT IS UNUSED, IT MUST BE LEFT
DISCONNECTED.
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Automatic Gain Control Input (AGC)
The AGC dynamically adjusts the gain of the preamplifier to compensate for the wide range of microphone input levels. The AGC allows the full range of whispers to loud sounds to be recorded with minimal distortion. The "attack" time is determined by the time constant of a 5 K internal resistance and an external capacitor (C2) connected from the AGC pin to VSSA analog ground. The "release" time is determined by the time constant of an external resistor (R2) and an external capacitor (C2 on the schematic on page 1-17) connected in parallel between the AGC Pin and VSSA analog ground. Nominal values of 470 K and 4.7 F give satisfactory results, in most cases. For AGC voltages of 1.5V and below, the preamplifier is at its maximum gain of 24 dB. Reduction in preamplifier gain occurs for voltages of approximately 1.8V.
End-Of-Message Output (EOM)
A non-volatile marker is automatically inserted at the end of each recorded message. It remains there until the message is recorded over. During Playback, the EOM output pulses LOW for a period of TEOM at the end of each message, or in the event of a message overflow (device full). In addition, the ISD1000A Series has an internal VCC detect circuit to maintain message integrity should VCC fall below 3.5V. In this case, EOM goes LOW and the device is fixed in Playbackonly mode. The EOM marker provides a convenient handshake signal for a processor, and also facilitates the cascading of devices.
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Product Data Sheets
ISD1000A Series
Analog Output (ANA OUT)
This pin provides the preamplifier output to the user. The voltage gain of the preamplifier is determined by the voltage level at the AGC pin. It has a maximum gain of about 24 dB for small input signal levels.
critical, as the clock is immediately divided by two. IF THE XCLK IS NOT USED, THIS INPUT MUST BE
CONNECTED TO GROUND.
Speaker Outputs (SP+/SP-)
All devices in the ISD1000A Series include an onchip differential speaker driver, capable of driving 50 milliwatts into 16 from AUX IN (12.2 mW from memory). The speaker outputs are held at VSSA levels during record and power down. It is therefore not possible to parallel speaker outputs of multiple ISD1000A devices or the outputs of other speaker drivers.
NOTE
Analog Input (ANA IN)
The analog input pin transfers its signal to the chip for recording. For microphone inputs, the ANA OUT pin should be connected via an external capacitor to the ANA IN pin. This capacitor value, together with the 2.7 K input impedance of ANA IN, is selected to give additional cutoff at the lowfrequency end of the voice passband. If the desired input is derived from a source other than a microphone, the signal can be fed, capacitively coupled, into the ANA IN pin directly.
Connection of speaker outputs in parallel may cause damage to the device.
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Optional External Clock Input (XCLK)
ISD1000A devices are configured at the factory with an internal sampling clock frequency centered to 1% of specification. The frequency is maintained to a total variation of 2.25% tolerance over the entire commercial temperature and 4.5 to 5.5 voltage ranges. The internal clock has a 5% tolerance over the industrial temperature range and 4.5 to 5.5 voltage range. A regulated power supply is recommended for industrial-temperature-range parts. If greater precision is required, the device can be clocked through the XCLK pin as follows.
While a single output may be used alone (including a coupling capacitor between the SP pin and the speaker), these outputs may be used individually with the output signal taken from either pin. Using the differential outputs results in a 4:1 improvement in output power.
NOTE
Never ground or drive an output.
Auxiliary Input (AUX IN)
The Auxiliary Input is multiplexed through to the output amplifier and speaker output pins when CE is HIGH and Playback has ended, or if the device is in overflow. When cascading multiple ISD1000A devices, the AUX IN pin is used to connect a Playback signal from a following device to the previous output speaker drivers. For noise considerations, it is suggested that the Auxiliary Input not be driven when the storage array is active.
Part Number ISD1016A ISD1020A
Sample Rate 8.0 KHz 6.4 KHz
Required Clock 1024 KHz 819.2 KHz
These recommended clock rates should not be varied because the antialiasing and smoothing filters are fixed, and aliasing problems can occur if the sample rate differs from the one recommended. The duty cycle on the input clock is not
Address/Mode Inputs (Ax/Mx)
The Address/Mode Inputs provide two functions in the ISD1000A Series: 1. Message address (either
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ISD1000A Series
Product Data Sheets
A6 or A7 = LOW) and 2. ISD1000A Series Operational Mode Options (A6 AND A7 = HIGH). Operational mode options are shown in the Operational Modes table. There are a maximum of 160 message addresses (or segments). Each segment corresponds to one of 160 rows in the analog storage array. The message addresses (segments) are in locations 0 through 159 contiguous. The playback/record duration of each segment depends upon the device and is as follows:
OPERATIONAL MODES
The ISD1000A Series is designed with several built-in operational modes provided to allow maximum functionality with a minimum of additional components, described in detail below. The operational modes use the address pins on the ISD1000A devices, but are mapped outside the valid address range. When the two Most Significant Bits (MSBs) are HIGH (A6 = A7=1), the remaining address signals are interpreted as mode bits and NOT as address bits. Therefore, operational modes and direct addressing are not compatible and cannot be used simultaneously. There are two important considerations for using operational modes. First, all operations begin initially at address 0, which is the beginning of the ISD1000A address space. Later operations can begin at other address locations, depending on the operational mode(s) chosen. In addition, the address pointer is reset to 0 when the device is changed from Record to Playback, or when a Power-Down cycle is executed. Second, an Operational Mode is executed when CE goes LOW and the two MSBs are HIGH. This Operational Mode remains in effect until the next
Part Number ISD1016A ISD1020A
Segment Playback/Record Duration 100 milliseconds 125 milliseconds
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An operation may be started at any address, as defined by address pins A0-A7. Record or playback continues with automatic incrementing of the internal on-chip address until either CE is brought HIGH (Record), an end of message marker is encountered (Playback with CE HIGH), or an overflow (device full) condition results.
OPERATIONAL MODES TABLE
Control Mode M0 M1 M2 M3 M4 M5 Function Message cueing Delete EOM markers Cascading Looping Consecutive addressing CE level-activated Typical Use Fast-forward through messages Position EOM marker at the end of the last message Adding devices to extend message Continuous playback from Address 0 Record/Play multiple consecutive messages Allow message pausing M1, M5 M0, M1, M5 M0, M1, M3, M4 Jointly Compatible* M4, M5 M3, M4, M5
NOTE: An asterisk (*) indicates additional operational modes which can be used simultaneously with the given mode.
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Product Data Sheets
ISD1000A Series
LOW-going CE signal, at which point the current address/mode levels are sampled and executed.
NOTE
M2 -- Used for Cascading
During playback, EOM goes LOW at array overflow only. Normal EOM pulses are turned off.
The two MSBs are on pins 9 and 10 for each ISD1000A Series member.
M3 -- Message Looping
The M3 Operational Mode allows for the automatic, continuously repeated playback of the message located at the beginning of the address space. A message CANNOT completely fill the ISD1000A device and loop.
OPERATIONAL MODES DESCRIPTION
The Operational Modes can be used in conjunction with a microcontroller, or they can be hardwired to provide the desired system operation.
M4 -- Consecutive Addressing
During normal operations, the address pointer will reset when a message is played through to an EOM marker. The M4 Operational Mode inhibits the address pointer reset on EOM, allowing messages to be played back consecutively.
M0 -- Message Cueing
Message Cueing allows the user to skip through messages, without knowing the actual physical addresses of each message. Each CE LOW pulse causes the internal address pointer to skip to the next message. This mode should be used for Playback only, and is typically used with the M4 Operational Mode.
M5 -- CE Level Activated
The default mode for ISD1000A devices is for CE to be edge-activated on Playback and level-activated on Record. The M5 Operational Mode causes the CE pin to be interpreted as level-activated as opposed to edge-activated during Playback. This is specifically useful for terminating Playback operations using the CE signal. In this mode, CE LOW begins a Playback cycle at the beginning of device memory.
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M1 -- Delete EOM Markers
The M1 Operational Mode allows sequentially recorded messages to be combined into a single message with only one EOM marker set at the end of the combined message. When this operational mode is configured, messages recorded sequentially are played back as one continuous message.
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ISD1000A Series
Product Data Sheets
TIMING DIAGRAMS
Record
CE TCE
TSET P/R THOLD PD Don't Care Don't Care T PDH Don't Care
A0-A7 Mic MIC Ana In ANA IN SP+/-
Don't Care TSET TPUD TREC
Don't Care
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Playback
CE TSET
P/R
TCE
Don't Care THOLD T PDH Don't Care
PD
Don't Care
A0-A7 A0-A9
Don't Care TSET
Don't Care
SP+/-
EOM TPUD T PLAY TEOM
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Product Data Sheets
ISD1000A Series
ABSOLUTE MAXIMUM RATINGS (PACKAGED PARTS)
Condition Junction temperature Storage temperature range Voltage applied to any pin Value 150 C -65 C to +150 C (VSS - 0.3 V) to (VCC + 0.3 V) (VSS - 1.0 V) to (VCC + 1.0 V) 300 C - 0.3 V to + 7.0 V
OPERATING CONDITIONS (PACKAGED PARTS)
Condition Commercial operating temperature range(1) Industrial operating temperature(1) Supply voltage (VCC)(2) Ground voltage (VSS)(3)
NOTES: 1. Case temperature. 2. VCC = VCCA = VCCD. 3. VSS = VSSA = VSSD.
Value 0 C to +70 C
-40 C to +85 C
Voltage applied to any pin (Input current limited to 20 mA) Lead temperature (soldering - 10 seconds) VCC - VSS
NOTE:
+4.5 V to +5.5 V 0V
Stresses above those listed may cause permanent damage to the device. Exposure to the absolute maximum ratings may affect device reliability. Functional operation is not implied at these conditions.
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DC PARAMETERS (PACKAGED PARTS)
Symbol VIL VIH VOL VOH VOH1 ICC ISB IIL REXT RMIC RAUX Parameters Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage 2.4 2.0 0.4 Min(2) Typ (1) Max(2) 0.8 Units V V V V IOL = 4.0 mA IOH = - 1.6 mA, VCC = 4.5 V to 5.5 V IOH = - 10 A REXT = (3)
(3)
Conditions VCC = 4.5 V to 5.5 V
Output High Voltage VCC Current (Operating) VCC Current (Standby) Input Leakage Current Output Load Impedance Preamp In Input Resistance AUX Input Resistance
VCC-0.4 25 1 30 10 1 16 10 10
V mA A A K K
Speaker Load Pins 17, 18 VCC = 4.5 V to 5.5 V
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ISD1000A Series
Product Data Sheets
DC PARAMETERS (PACKAGED PARTS) - CONTINUED
Symbol RANA IN APRE1 APRE2 AAUX AARP RAGC IPREH IPREL Parameters ANA IN Input Resistance Preamp Gain 1 Min(2) Typ (1) 3.0 24 Max(2) Units K dB AGC = 0.0 V, VCC = 4.5 V to 5.5 V AGC = 2.5 V VCC = 4.5 V to 5.5 V Conditions
Preamp Gain 2 AUX IN/ SP+ Gain ANA IN to SP+/- Gain AGC Output Resistance Preamp Out Source 0.9
- 45
15
dB V/V
22 5 -1
dB K mA @ VOUT = 1.0 V, VCC = 4.5 V to 5.5 V @ VOUT = 2.0 V, VCC = 4.5 V to 5.5 V
Preamp In Sink
0.8
mA
-1
NOTES: 1. Typical values @ TA = 25 C and 5.0 V. 2. All Min/Max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100% tested. 3. VCCA and VCCD connected together.
AC PARAMETERS (PACKAGED PARTS)
Symbol FS FCF Characteristic Internal Clock Sampling Frequency Filter Pass Band -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A 100 100 300 300 0 0 18.75 31.25 Min(2) Typ (1) 8 6.4 3.4 2.7 16 20 16 20 Max(2) Units KHz KHz KHz KHz sec sec sec sec nsec nsec nsec nsec nsec nsec msec msec
(9) (9) (9) (9)
Conditions
3 dB Roll-Off Point(3)(10) 3 dB Roll-Off Point(3)(10)
TREC TPLAY TCE TSET THOLD TPUD
Record Duration Playback Duration CE Pulse Width Control/Address Setup Time Control/Address Hold Time Power-Up Delay
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Product Data Sheets
ISD1000A Series
AC PARAMETERS (PACKAGED PARTS) - CONTINUED
Symbol TPDR TPDP TPDS TPDH TEOM THD POUT Characteristic PD Pulse Width - Record PD Pulse Width - Play PD Pulse Width - Static Power Down Hold EOM Pulse Width Total Harmonic Distortion Speaker Output Power -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A VOUT VIN1 Voltage Across Speaker Pins -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A 0 0 12.5 15.6 1 1 12.5 12.5 50 50 2.5 2.5 20 20 50 50 1.25 1.25 Min(2) Typ (1) 25 31.25 12.5 15.625 100 100 Max(2) Units msec msec msec msec nsec nsec nsec nsec msec msec % % mW mW V p-p V p-p mV mV mV mV V p-p V p-p @ 1 KHz @ 1 KHz REXT = 16 (4) REXT = 16 (4) REXT = 600 REXT = 600 Peak-to-Peak(5) Peak-to-Peak(5) Peak-to-Peak Peak-to-Peak REXT = 16 REXT = 16
(6) (6) (7) (7) (8) (8)
Conditions
1
MIC Input Voltage
VIN2 VIN3
ANA IN Input Voltage AUX IN Input Voltage
NOTES: 1. 2. 3. 4. 5. 6. 7. 8. 9.
10.
Typical values @ TA = 25 C and 5.0 V. All Min/Max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100% tested. Low-frequency cutoff depends upon value of external capacitors (see Pin Descriptions). From AUX IN; if ANA IN is driven at 50 mV p-p, the POUT= 12.2 mW, typical. With 5.1 K series resistor at ANA IN. This is the minimum pulse width required to guarantee that a Record cycle will be interrupted. A LOW-going PD pulse of less than this interval during Record may be ignored. This is the minimum pulse width required to guarantee that a Playback cycle will be interrupted. A LOW-going PD pulse of less than this interval during Playback may be ignored. This is the minimum pulse width required to reset the device when in a static condition; i.e., not actively recording or playing back. Sampling Frequency and Playback Duration will vary as much as 2.25% over the commercial temperature and voltage range and 5% over the industrial temperature and voltage range. For greater stability, an external clock can be utilized (see Pin Descriptions). Filter specification applies to the antialiasing filter and to the smoothing filter.
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ISD1000A Series
Product Data Sheets
TYPICAL PARAMETER VARIATION WITH VOLTAGE AND TEMPERATURE (PACKAGED PARTS)
RECORD MODE OPERATING CURRENT (ICC) 25 Operating Current (mA) 0.7 0.6 Standby Current (A) 20 0.5 0.4 0.3 0.2 0.1 0 25 70 85 -40
STANDBY CURRENT (ISB)
15
10
5
-1
0 -40 Temperature (C)
25
70
85
Temperature (C)
TOTAL HARMONIC DISTORTION 0.6 Percent Distortion (%) 0.5 0.4 0.3 0.2 0.1 0 -40 25 70 85 Percent Change (%) 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -40
OSCILLATOR STABILITY
25
70
85
Temperature (C)
Temperature (C)
5.5 Volts
4.5 Volts
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Product Data Sheets
ISD1000A Series
ABSOLUTE MAXIMUM RATINGS (DIE)
Condition Junction temperature Storage temperature range Voltage applied to any pad Value 150 C -65 C to +150 C (VSS - 0.3 V) to (VCC + 0.3 V)
OPERATING CONDITIONS (DIE)
Condition Commercial operating temperature range (1) Supply voltage (VCC)(2) Ground voltage (VSS)(3)
NOTES: 1. Case temperature. 2. VCC = VCCA = VCCD. 3. VSS = VSSA = VSSD.
Value 0 C to +50 C
+4.5 V to +6.5 V 0V
Voltage applied to any pad (VSS - 1.0 V) to (Input current limited to 20 mA) (VCC + 1.0 V) VCC - VSS
NOTE:
- 0.3 V to + 7.0 V
Stresses above those listed may cause permanent damage to the device. Exposure to the absolute maximum ratings may affect device reliability. Functional operation is not implied at these conditions.
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DC PARAMETERS (DIE)
Symbol VIL VIH VOL VOH VOH1 ICC ISB IIL REXT RMIC RAUX RANA IN Parameters Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage 2.4 2.0 0.4 Min(2) Typ(1) Max(2) 0.8 Units V V V V IOL = 4.0 mA IOH = -1.6 mA, VCC = 4.5 V to 5.5 V IOH = - 10 A REXT = (3)
(3)
Conditions VCC = 4.5 V to 5.5 V
Output High Voltage VCC Current (Operating) VCC Current (Standby) Input Leakage Current Output Load Impedance Preamp In Input Resistance AUX Input Resistance ANA IN Input Resistance
VCC-0.4 25 1 30 10 1 16 10 10 3.0
V mA A A K K K
Speaker Load Pins 17, 18 VCC = 4.5 V to 5.5 V
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ISD1000A Series
Product Data Sheets
DC PARAMETERS (DIE) - CONTINUED
Symbol APRE1 APRE2 AAUX AARP RAGC IPREH IPREL Parameters Preamp Gain 1 Min(2) Typ(1) 24 Max(2) Units dB Conditions AGC = 0.0 V, VCC = 4.5 V to 5.5 V AGC = 2.5 V VCC = 4.5 V to 5.5 V
Preamp Gain 2 AUX IN/ SP+ Gain ANA IN to SP+/- Gain AGC Output Resistance Preamp Out Source 0.9
- 45
15
dB V/V
22 5 -1
dB K mA @ VOUT = 1.0 V, VCC = 4.5 V to 5.5 V @ VOUT = 2.0 V, VCC = 4.5 V to 5.5 V
Preamp In Sink
0.8
mA
-1
NOTES: 1. Typical values @ TA = 25 C and 5.0 V. 2. All Min/Max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100% tested. 3. VCCA and VCCD connected together.
AC PARAMETERS (DIE)
Symbol FS FCF Characteristic Internal Clock Sampling Frequency Filter Pass Band -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A 100 100 300 300 0 0 18.75 31.25 25 31.25 Min(2) Typ (1) 8 6.4 3.4 2.7 16 20 16 20 Max(2) Units KHz KHz KHz KHz sec sec sec sec nsec nsec nsec nsec nsec nsec msec msec msec msec
(6) (6) (9) (9) (9) (9)
Conditions
3 dB Roll-Off Point(3)(10) 3 dB Roll-Off Point(3)(10)
TREC TPLAY TCE TSET THOLD TPUD TPDR
Record Duration Playback Duration CE Pulse Width Control/Address Setup Time Control/Address Hold Time Power-Up Delay PD Pulse Width - Record
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Product Data Sheets
ISD1000A Series
AC PARAMETERS (DIE) - CONTINUED
Symbol TPDP TPDS TPDH TEOM THD POUT Characteristic PD Pulse Width - Play PD Pulse Width - Static Power Down Hold EOM Pulse Width Total Harmonic Distortion Speaker Output Power -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A VOUT VIN1 Voltage Across Speaker Pins -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A -- ISD1016A -- ISD1020A 0 0 12.5 15.6 1 1 12.5 12.5 50 50 2.5 2.5 20 20 50 50 1.25 1.25 Min(2) Typ (1) 12.5 15.625 100 100 Max(2) Units msec msec nsec nsec nsec nsec msec msec % % mW mW V p-p V p-p mV mV mV mV V p-p V p-p @ 1 KHz @ 1 KHz REXT = 16 (4) REXT = 16 (4) REXT = 600 REXT = 600 Peak-to-Peak(5) Peak-to-Peak(5) Peak-to-Peak Peak-to-Peak REXT = 16 REXT = 16
(7) (7) (8) (8)
Conditions
1
MIC Input Voltage
VIN2 VIN3
ANA IN Input Voltage AUX IN Input Voltage
NOTES: 1. Typical values @ TA = 25 C and 5.0 V. 2. All Min/Max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100% tested. 3. Low-frequency cutoff depends upon value of external capacitors (see Pin Descriptions). 4. From AUX IN; if ANA IN is driven at 50 mV p-p, the POUT= 12.2 mW, typical. 5. With 5.1 K series resistor at ANA IN. 6. This is the minimum pulse width required to guarantee that a Record cycle will be interrupted. A LOW-going PD pulse of less than this interval during Record may be ignored. 7. This is the minimum pulse width required to guarantee that a Playback cycle will be interrupted. A LOW-going PD pulse of less than this interval during Playback may be ignored. 8. This is the minimum pulse width required to reset the device when in a static condition; i.e., not actively recording or playing back. 9. Sampling frequency and Playback duration will vary as much as 2.25% over the commercial temperature and voltage range. For greater stability, an external clock can be utilized (see Pin Descriptions). 10. Filter specification applies to the antialiasing filter and to the smoothing filter.
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ISD1000A Series
Product Data Sheets
TYPICAL PARAMETER VARIATION WITH VOLTAGE AND TEMPERATURE (DIE)
RECORD MODE OPERATING CURRENT (ICC) 25 Operating Current (mA) 0.8 0.7 Standby Current (A) 20 0.6 0.5 0.4 0.3 0.2 0.1 0 0 25 Temperature (C) 50 0 0
STANDBY CURRENT (ISB)
15
10
5
-1
25 Temperature (C)
50
TOTAL HARMONIC DISTORTION 0.5 2.5 2.0 Percent Distortion (%) 0.4 Percent Change (%) 1.5 1.0 0.5 0 -0.5 -1.0 0 0 25 Temperature (C) 50 -1.5 0
OSCILLATOR STABILITY
0.3
0.2
0.1
25 Temperature (C)
50
6.5 Volts
5.5 Volts
4.5 Volts
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Product Data Sheets
ISD1000A Series
APPLICATION EXAMPLE - DESIGN SCHEMATIC
V CC CHIP ENABLE VSS
1 2 3
ISD1016A/1020A
A0 A1 A2 A3 A4 A5 A6 A7 CE PD P/R EOM XCLK VCCD 28 VCCA 16 VSSD VSSA SP+ SP- AUX IN ANA IN ANA OUT MIC REF MIC AGC
12 13 14 15 11 20 21 18 17 19
V CC C8 C7 0.1 F 22 F
POWER DOWN
4 5 6 9 10 23 24 27 25 26
C6 0.1 F
PLAYBACK/RECORD
R5 5.1 K (Note)
C3 0.1 F
16 SPEAKER
C5 V CC R1 1 K C2 4.7 F C1 0.1 F R3 10 K ELECTRET C 4 MICROPHONE 220 F 0.1 F Mic Ref
NOTE:
If desired, pin 18 may be left unconnected (microphone preamplifier noise will be higher). In this case, pin 18 must not be tied to any other signal or voltage. Additional design example schematics are provided in the Application Notes and Design Manual in this book.
R2 470 K
R4 10 K
1
APPLICATION EXAMPLE - BASIC DEVICE CONTROL
Control Step 1 2 3 4 Function Power up chip and select record/playback mode Set message address for record/playback Begin playback/record End cycle Action 1. PD = LOW 2. P/R = As desired Set addresses A0-A7 CE = Pulsed LOW (Playback) CE = Held LOW (Record) CE = HIGH and EOM reached
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ISD1000A Series
Product Data Sheets
APPLICATION EXAMPLE - PASSIVE COMPONENT FUNCTIONS
Part R1 R2 R3, R4 R5 C1, C5 Function Microphone power supply decoupling Release time constant Microphone biasing resistors Series limiting resistor Microphone DC-blocking capacitor Low-frequency cutoff Attack/Release time constant Low-frequency cutoff capacitor Microphone power supply decoupling Power supply capacitors Comments Reduces power supply noise Sets release time for AGC Provides biasing for microphone operation Reduces level at high supply voltages Decouples microphone bias from chip. Provides single-pole low-frequency cutoff and common-mode noise rejection Sets attack/release time for AGC Provides additional pole for low-frequency cutoff Reduces power supply noise Filter and bypass of power supply
C2 C3 C4
-1
C6, C7, C8
1-18
Product Data Sheets
ISD1000A Series
ORDERING INFORMATION
Product Number Descriptor Key
ISD10 _ _ A _ _
ISD1000A Series Duration: 16 = 16 Seconds 20 = 20 Seconds
Special Temperature Field: Blank = Commercial Packaged (0C to +70C) or Commercial Die (0C to +50C) I = Industrial (-40C to +85C) Package Type: G = 28-Lead 0.350-Inch Small Outline Integrated Circuit (SOIC) P = 28-Lead 0.600-Inch Plastic Dual In-Line Package (PDIP) X = Die
1
When ordering ISD1000A Series devices, please refer to the following valid part numbers.
Part Number ISD1016AG ISD1016AGI ISD1016AP ISD1016API ISD1016AX
Part Number ISD1020AG ISD1020AGI ISD1020AP ISD1020API ISD1020AX
For the latest product information, access ISD's worldwide website at http://www.isd.com.
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ISD1000A Series
Product Data Sheets
-1
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